Stratix development kit launched by Altera

The kit features hardware and software solutions for the creation of designs using Altera's 40-nm Stratix IV GX FPGAs with integrated 8.5Gbps transceivers.

Altera said the development kit provides an ideal environment for designing and testing high-speed serial interfaces, such as PCI Express (PCIe) Gen2, with up to x8-lane configurations.

The Stratix IV GX FPGA development kit offers a complete PCIe Gen2 end-point hardware design package, featuring a PCI-SIG-compliant board and two PCIe Gen2 hard intellectual property (IP) cores in the Stratix IV GX FPGA.

A PCIe high-performance reference design that demonstrates both the software and hardware elements of a PCIe system is available for download on the Altera website.

The two elements of this reference design communicate with drivers created using Jungo's PCIe Windriver tool, forming a fully functional PCIe system.

Several other protocols are supported by the development kit through the use of high-speed mezzanine cards available from Altera partners, including 10 Gigabit Ethernet (10GbE), CPRI, OBSAI, SAS/SATA and Serial RapidIO (SRIO).

The Stratix IV GX FPGA development kit provides customers with innovations within Stratix IV GX FPGAs, including 36 full-duplex transceivers (24 of which operate at up to 8.5Gbps), two PCIe hard IP blocks, 230K logic elements (LEs) and 13.9Mbits of embedded memory.

The development kit features a Stratix IV GX EP4SGX230 FPGA-based development board, a one-year license of Quartus II software - development-kit edition, and access to Altera's Megacore IP library including the Nios II embedded design suite.