XJTAG schedules 2009 boundary scan workshops

The full-day sessions, which will run throughout the spring and summer at its Cambridge, UK headquarters, are designed to provide design, development, test, and production engineers with a practical, hands-on introduction to boundary scan.

Stuart White, workshop coordinator at XJTAG, said: 'We explain how boundary scan can be used to improve designs, reduce re-spins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits.' The free workshops will give an overview of the IEEE 1149.x standard, demonstrate how to communicate with the JTAG chain and interact with JTAG devices, such as FPGAs.

They will provide an introduction to board testing using the JTAG chain, explain how to describe a circuit to enable JTAG testing and how to run an infrastructure connection test.

Finally, the trainers will outline how to test non-JTAG elements of a board design using boundary scan.

The XJTAG development system is a cost-effective solution for debugging, testing and programming electronic printed circuit boards and systems throughout the product lifecycle.

XJTAG reduces the time and cost of board development by allowing early development of reconfigurable test scripts that can be used from design validation through prototype debugging and on into manufacturing.