3L enhances Diamond multiprocessor tool suite

Diamond's multiprocessor compiler automatically creates and then optimises communication paths between multiple processors.

For designers targeting TI's C6000 series digital signal processors (DSPs), Diamond 3.2 automatically creates Code Composer Studio GEL scripts to allow easy debugging of multiple DSPs.

To accelerate FPGA design and verification within a multiprocessor environment, Diamond 3.2 is ISE10.1 ready and its HDL simulation capabilities have been further enhanced with the automatic creation of simulation projects.

Typical multiprocessor systems are constructed with modules comprising multiple DSP, GPP and FPGA processors.

To connect these multiple processors, designers have traditionally relied on low-level design techniques, drawn upon their intimate processor, board-level and system knowledge and optimised the design though numerous and time-consuming iterations.

With Diamond 3.2, connections between attached processors are handled automatically.

Using the Diamond IDE, the designer is able to place tasks, or self-contained blocks of code, onto the system processors and connect them with channels that do not require physical information.

Diamond then manufactures the firmware needed for the interconnect, optimises the design and creates the physical implementation.

The overhead and burden of interconnect design on the developer is reduced, allowing them to devote more effort on algorithm design and application optimisation.