Quicklogic expands line of I/O PSBs for CSSPs
Quicklogic
Smart I/O PSBs
Quicklogic has expanded its line of Smart I/O Proven System Blocks (PSBs) for use in Customer Specific Standard Products (CSSPs).
Among the PSBs are an I2C master controller, a pulse-width modulator (PWM), a PS2 controller and a low-power matrix keyboard controller.
Quicklogic's PSB library includes I/O functions such as USB 2.0 high-speed Host/Client/OTG, various memory card and HDD mass storage interfaces, general-purpose I/O (GPIO) and LCD display controllers featuring Quicklogic's Visual Enhancement Engine (VEE).
PS/2 interface, PWM control, matrix keyboard, and I2C host controller functions have been added and, due to their configurable nature, can efficiently connect I/O functions to whatever processor architecture the developer chooses.
These I/O functions are especially valuable in the smartbook/netbook market and PS/2 interfaces are commonly used for controlling touchpad pointing devices.
I2C master controllers provide efficient control of position and orientation sensors such as electronic compasses and accelerometers, ambient light and proximity sensors, as well as touch-screen controllers.
PWM controllers provide backlight intensity control as well as on-off and variable brightness control for indicator LEDs, including the 'breathing' functionality.
A matrix keyboard controller provides a low-power interface for low-cost, full-function keyboards and includes support for high-end features such as three-key rollover and ghosting detection.
Quicklogic's Smart I/O PSBs enable developers to reduce system power demands.
The I2C controller, for instance, can aggregate positioning information and send it to the CPU on a schedule rather than being interrupt-driven, allowing the CPU to spend more time in a low-power sleep mode.
The matrix keyboard controller eliminates the need for active elements in the keyboard - also reducing power consumption.
A tightly coupled Power Management Unit (PMU) allows for clock multiplexing on a PSB-by-PSB basis to ensure PSBs run from a very low frequency 32kHz hibernate clock when not in use.
All Smart I/O PSBs can be embedded in all CSSPs utilising the PolarPro, PolarPro II, ArcticLink and ArcticLink II solution platform families.
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