PLX introduces four PCIe switches

The PLX Expresslane PEX 8696 (96 lanes, 24 ports), the PEX 8680 (80 lanes, 20 ports), the PEX 8664 (64 lanes, 16 ports) and the PEX 8649 (48 lanes, 12 ports) are PCI-SIG PCIe 2.0 (Gen 2) specification-compliant switches with distinguishing PLX-only features.

These features include support for x16 port configurations and non-transparency (NT), as well as Visionpak and Performancepak development tools.

The PLX devices also implement game-changing Multi-root and Multicast features.

These large switches allow designers to build switch fabrics, redundant backplanes and large I/O/storage drawers without having to deal with the high-latency, high-power consumption and bandwidth limitations associated with use of multiple smaller switch chips.

The standard Multicast feature was added to the new PLX switches to increase performance by reducing central-processing unit (CPU) load.

Multicast is claimed to deliver data to a group of destinations simultaneously, thus efficiently using memory bandwidth at the source and relieving the host from copying the data to multiple locations sequentially.

PLX chaired the working group at the PCI-SIG that created this standard.

For use in backplane applications, PLX switches support fully non-blocking internal fabric and full peer-to-peer data exchange at full Gen 2 line rate without any host assistance.

PEX 8696 supports a total raw throughput of up to one terabit per second in full-duplex mode at PCIe Gen 2 rates.

The Multi-root/Multi-host feature of PLX switches offers two modes of functionality.

Mode-1 enables one host port to control up to 23 endpoints or all 24 ports communicate in peer-to-peer mode in backplane applications where one port can be configured as NT.

In Mode-1, NT capability can be used for fail-over and redundancy.

Mode-2 expands on this with up to eight host ports.

This allows for partition in up to eight independent switches with each switch having full isolation and one independent host and several endpoints.

In fail-over mode, independent hosts can exchange status or heartbeat information.

When a fail-over is triggered, the endpoints associated with a failing host are automatically moved to a back-up host without affecting the traffic between the back-up host and its existing endpoints.

The endpoints in one host domain can also be moved to another host domain under software control for I/O sharing.

An exclusive set of diagnostic and monitoring features called Visionpak are integrated into all PLX Gen 2 switches.

Offered standard via the PLX software design kit (SDK), Visionpak includes: the ability to access internal data paths and state machines for debugging systems; a tool to measure Rx eye width inside the device for validating signal integrity; a function to inject errors to check system behaviour; a loopback Tx to debug data paths; and the capability for packet performance/activity monitoring.

Also fully integrated into all PLX Gen 2 switches is the PLX Performancepak, which provides designers with additional functions to reach peak performance and includes read pacing to fairly allocate host port bandwidth, along with dynamic buffer allocation to absorb fluctuations in bandwidth demand.